{
	"title": "Boxed Intel(R) Core(TM)2 Extreme Processor QX9650, PCN 108241-02, Product Design, C-0 to C-1 Stepping Conversion, Reason for Revision: Adjust the Customer Ready to Receive Date",
	"id": "810004",
	"created_at": "2023-12-21T17:13:02+00:00",
	"modified_at": "2008-04-03T00:00:00+00:00",
	"description": "Desktop Processors, Product Design, Customers to place future orders using new order code, see details in PCN.",
	"download_url": "https://cdrdv2-public.intel.com/810004/PCN108241-02.pdf",
	"html_url": "https://intel.com/content/www/us/en/content-details/810004/boxed-intel-r-core-tm-2-extreme-processor-qx9650-pcn-108241-02-product-design-c-0-to-c-1-stepping-conversion-reason-for-revision-adjust-the-customer-ready-to-receive-date.html",
	"url": "https://intel.pcn.captnemo.in/pcn/810004",
	"category": "Product Change Notifications (PCN)",
	"self": "https://intel.pcn.captnemo.in/api/810004.json"
}